PART A
1.Define Computer Architecture
Computer Architecture Is Defined As The Functional Operation
Of The Individual H/W Unit In A Computer System And The Flow Of Information
Among The Control Of Those Units
2.Define Computer H/W
Computer H/W Is The
Electronic Circuit And Electro Mechanical Equipment That Constitutes The
Computer
3. What Is Meant By Cache Memory ?
A Memory That Is Smaller And Faster Than Main Memory And
That Is Interposed Between The Cpu And Main Memory. The Cache Acts As A Buffer
For Recently Used Memory Location
4.what is locality of reference?
Many instruction in localized area of the program are
executed repeatedly during some time period and the remainder of the program is
accessed relatively infrequently .this is referred as locality of reference.
5.what is IO mapped input output?
A memory reference instruction activated the READ M
(or)WRITE M control line and does not affect the IO device. Separate IO
instruction are required to activate the READ IOand WRITE IO lines ,which cause
a word to be transferred between the address aio port and the CPU. The memory
and IO address space are kept separate.
6.specify the three types of the DMA transfer techniques?
Single transfer mode(cyclestealing mode)
Block Transfer Mode(Brust Mode)
Demand Transfer Mode
Cascade Mode
7. why is memory refreshing circuit needed ?
al cells on the corresponding yow to be read and refreshed
during both read and write operation .the contents of the d ram are maintained
each row of cell must be accessed periodically once every 2 – 16 ms. refresh circuit usually performs this
function .
automatically
8 what are the functions of control unit ?
the memory arithmetic
and logic ,and input and output units
store and process information and perform i/p and o/p operation, the operation
of these unit must be co ordinate in some way this is the task of control unit the cu is
effectively the nerve center that sends
the control signal to other units and sence their states.
9.What is an interrupt?
An interrupt is an event that causes the execution of one
program to be suspended and another
program to be executed.
10.What are the uses of interrupts?
- Recovery
from errors
- Debugging
- Communication
between programs
- Use of
interrupts in operating system
11.Define vectored interrupts.
In order to reduce
the overhead involved in the polling process, a device requesting an interrupt
may identify itself directly to the CPU. Then, the CPU can immediately start
executing the corresponding interrupt-service routine. The term vectored
interrupts refers to all interrupt-handling schemes base on this approach.
12. What is the need for reduced instruction chip?
1. Relatively
few instruction types and addressing modes.
2. Fixed
and easily decoded instruction formats.
3. Fast
single-cycle instruction execution.
4. Hardwired
rather than microprogrammed control.
13. Name any three of the standard I/O interface.
1. SCSI
(small computer system interface),bus standards
2. Back
plane bus standards
3. IEEE
796 bus (multibus signals)
4. NUBUS
5. IEEE
488 bus standard
14. Differentiate between RISC and CISC
RISC
CISC
1. Reduced
Instruction Set Computer 1. Complex Instruction set
computer
2. Simple
instructions take one cycle per
2. Complex instruction take
multiple
Operation.
Cycles per operation.
3. Few
instructions and address modes are
3. Many instruction and address
Used. Modes.
4. Fixed format instructions are used. 4. Variable format
instructions are
used.
5.Instructions are compiled and then 5. Instructions are
interpreted by the
executed by
hardware.
Microprogram and then executed.
6. RISC machines are
multiple register 6. CISC machines use single register
set.
Set.
7. Complexity in the
compiler
7. Complexity in the microprogram
8. RISC machines are higly piplined 8. CISC machines are
not piplined.
15.Explain the pipeline types.
- Instruction
pipeline
- Arithmetic
pipeline
16. Explain the various classifications of parallel
structures.
1. SISD
(single instruction stream single data stream
2. SIMD(single
instruction stream multiple data stream
3. MIMD(multiple
instruction stream multiple data stream
4. MISD(multiple
instruction stream single data stream
17. What is absolute addressing mode?
The address of the
location of the operand is given explicitly as a part of the instruction.
Eg. Move a , 2000
18. Specify three types of data transfer techniques.
1. Arithmetic
data transfer
2. Logical
data transfer
3. Programmed
control data transfer
19. What is the role of MAR and MDR?
The MAR (memory address
register) is used to hold the address of the location to or from which data are
to be transferred and the MDR(memory data register) contains the data to be
written into or read out of the addressed location.
20. What are the various types of operations required for
instructions?
1. Data
transfers between the main memory and the CPU registers
2. Arithmetic
and logic operation on data
3. Program
sequencing and control
4. I/O
transfers
21. What is the role of IR and PC?
Instruction Register
(IR) contains the instruction being executed. Its output is available to the
control circuits, which generate the timing signals for controlling the
processing circuits needed to execute the instructions.
The Program Counter (PC) register keeps track of the
execution of the program. It contains the memory address of the instruction
currently being executed . During the execution of the current instruction, the
contents of the PC are updated to correspond to the address of the next
instructions to be executed.
22.Define memory access time?
The time that
elapses between the initiation of an
operation and completion of that
operation ,for example ,the time between the READ and the MFC signals .This is
Referred to as memory
access time.
23. Define memory cycle time.
The minimum time delay required between the
initiations of two successive memory operations, for example, the time between
two successive READ operations.
24.Define Static Memories.
Memories that
consist of circuits capable of retaining the state as long as power is applied
are known as static memories.
25.Distinguish Between Static RAM and Dynamic RAM?
Static RAM are fast, but they come at high cost because
their cells require several transistors. Less expensive RAM can be implemented
if simpler cells are used. However such cells do not retain their state
indefinitely; Hence they are called Dynamic RAM.
26.Distiguish between asynchronies DRAM and synchronous RAM.
The specialized
memory controller circuit provides the necessary control signals, RAS And CAS
,that govern the timing. The processor must take into account the delay in the
response of the memory. Such memories are referred to as asynchronous DRAMS.
The DRAM whose operations is directly synchronized with a
clock signal. Such
Memories are known as synchronous DRAM
27.what are the various units in the computer?
1,input unit
2.output unit
3.control unit
4.memory unit
5.arithmetic and logical unit
28.what is an I/O channel?
An i/o channel is actually a special purpose processor, also called
peripheral processor.
The main processor initiates a
transfer by passing the required information in the input output channel. the
channel then takes over and controls the actual transfer of data.
29.what is a bus?
A collection of wires that connects several devices is called a bus.
30.Define word length?
Each group of n bits is referred to as a
word of information and n is called the word length.
31.explain the following the
address instruction?
1.three-address instruction-it can be represented as
add a,b,c
Operands a,b are called source operand
and c is called destination operand.
2.two-address instruction-it can
be represented as
add a,b
3.one address instruction-it can
be represented as
add a
4.1 1/2 address instruction
it can be represented the type of instruction in which one address
always refers to a location in the main memory and the other, shorter address
always refers to a cpu register, is intermediate to the one-two-address formats
because of this property is called I ½ address
format.
5.zero address instruction.
It is also possible to use instruction where the location s of all
operand are defined implicitly. This operand of the use of the method for
storing the operand in which called
push down stack. Such instructions are
sometimes referred to us zero address instruction.
32.what is the straight-line
sequencing?
the
cpu control circuitry automatically proceed to fetch and execute
instruction, one at a time in the order of the increasing addresses. This is
called straight line sequencing.
33.what is the role of pc?
The cpu contains a register called the
program counter, which holds the address of instruction to be executed next..
to begin the execution of the program the address of its
First instruction must be placed
into the pc.
34.what are steps for execution of
a complete instruction?
1.fetch the instruction.
2.fetch the first operand (the
contents of the memory location pointed by the address field of the
instruction.)
3.perform the calculation.
4.load the result.
35.what is a a bit slice?
A bit slice is “slice” through the data path of the typical processor.
It contains all
Circuits necessary to provide alu
function, register transfer and control function for only a few bits of the
data path.
36.what is DMA?
A
special control unit may be provided to enable transfer a block of data
directly between an external device and memory without contiguous intervention
by the cpu. This approach is called DMA.
37.why program controlled I/O is
unsuitable for high-speed data transfer?
- in
program controlled i/o considerable overhead is incurred.. because several
program instruction have to be executed for each data word transferred between the external devices
and MM.
- many
high speed peripheral; devices have a synchronous modes of operation.
that is data transfer
are controlled by a clock of fixed frequency, independent of the cpu.
38.what is the function of i/o interface?
The function is
to coordinate the transfer of data between the cpu and external devices.
39.what is NUBUS?
A NUBUS is a processor independent, synchronous bus
standard intended for use in
32 bit micro processor system. It defines a backplane into
which upto 16 devices may be plugged each in the form of circuit board of
standard dimensions.
40. what do you mean associative mapping technique?
The tag of an
address received from the CPU is compared to the tag bits of each block of the
cache to see if the desired block is present. This is called associative
mapping technique.
41. What is LRU replacement algorithm?
When a block is to
be overwritten it is sensible to overwrite the one that has gone the largest
time without being referenced. This block is called Least Recently Used
block and the technique is called LRU
replacement algorithm.
42. Explain virtual memory technique.
Techniques that
automatically move program and data blocks into the physical memory when they
are required for execution are called virtual memory technique.
43. What are virtual and logical addresses?
The binary
addresses that the processor issues for either instruction or data are called
virtual or logical addresses.
44. Define translation buffer.
Most
commercial virtual memory systems incorporate a mechanism that can avoid the
bulk of the main memory access called for by the virtual to physical addresses
translation buffer. This may be done with a cache memory called a translation
buffer, which retains the results of the recent translation.
45. Name some of the IO devices.
1.
Video terminals
2.
Video displays
3.
Alphanumeric displays
4.
Graphics displays
5.
Flat panel displays
6.
Printers
7.
Plotters
46. What is branch delay slot?
The location
containing an instruction that may be fetched and then discarded because of the
branch is called branch delay slot.
47. What is optical memory?
Optical or
light based techniques for data storage, such memories usually employ optical
disk which resemble magnetic disk in that they store binary information in
concentric tracks on an electromechanically rotated disks. The information is
read as or written optically, however with a laser replacing the read write arm
of a magnetic disk drive. Optical memory offer high storage capacities but
their access rate is are generally less than those of magnetic disk.
48. What is microprogrammed
control?
Microprogrammed control in which control
signals are generated by a program similar to machine language program. A
sequence of one (or) more microoperation, such as addition, multiplication is
called a micro program. The address where these microinstructions are stored in
CM is generated by microprogrammed control.
49. What is microprogramming?
A sequence of Control Words corresponding
to the control sequence of a machine instruction constitutes the micro routine
for that instruction, and the individual control words in this micro routine
are referred to as microinstructions.
Microprogramming is a method of control
unit design in which the control signal selection and sequencing information is
stored in a ROM (or) RAM called a control memory CM.
50.What are static and dynamic
memories?
Static memory are memories which require periodic no refreshing. Dynamic
memories are memories, which require periodic refreshing.
51. What are the steps required
for a pipelinened processor to process the instruction?
1. F
Fetch: read the instruction from the memory
2. D Decode: decode the instruction and fetch the
source operand(s).
3. E Execute: perform the operation specified by
the instruction.
4. W Write: store the result in the destination
location.
52. What are the steps taken when an interrupt occurs?
1. Source
of the interrupt
2. The
memory address of the required ISP
3. The
program counter & cpu information saved in subroutine
4. Transfer
control back to the interrupted program
53 Define instruction pipeline.
The transfer of
instructions through various stages of the cpu instruction cycle., including
fetch opcode,decode opcode,compute operand addresses. Fetch operands, execute
instructions and store results. This amounts to realizing most (or) all of the
cpu in the form of multifunction pipeline called an instruction pipelining.
54. Define latency.
The term
memory latency is used to refer to the amount of time it takes to transfer a word of data to or from the memory. The
term latency is used to denote the time it takes to transfer the first word of
data. This time is usually substantially longer than the time needed to
transfer each subsequent word of a block.
55. Define bandwidth.
Bandwidth is a
product of the rate at which the data are transferred (and accessed) and the
width of the data bus.
56. Define hit rate.
A successful
access to data in a cache is called a hit. Number of hits stated as a fraction
of all attempted accesses is called the hit rate.
57. Define miss rate.
A miss rate is
the number of misses stated as a fraction of attempted accesses. Extra time
needed to bring the desired information into the cache is called the miss
penalty.
58. Distinguish between system space and user space.
assembling
the operating system routine into a virtual address space , is called system
space that is separate from the virtual space in which user application program
reside. The latter space is called user space.
59.Define
1. Signal - The
binary information is represented in digital computers by physical quantities
called signals.
- Gates
– The manipulation of binary information is done by logic circuits called
gates. Gates are blocks of hardware that produce signals of binary 1 or 0
where input logic requirements are satisfied.
3. Flip flop – The storage elements employed in clocked
sequential circuits are called flip flops. A flip flop is a binary cell capable
of storing 1 bit of information.
60. Define combinational circuit.
A
combinational circuit is a connected arrangement of logic gates with the set of
inputs and outputs. A combinational circuit transforms binary information from
the given input data to the required output data. Combinational are employed in
digital computers required for generating binary control decisions and for
providing digital components required for data processing.
61. Define sequential circuits.
A sequential circuit is an interconnectin of flip-flops and
gates. The gates by themselves constitute a combinational circuit, but when
included with the flip flops, the overall circuit is classified as a sequential
circuit.
62. Define
interface.
The word
interface refers to the boundary between two circuits or devices.
63. Define
pipelining.
Pipelining is a techinique of
decomposing a sequential process into sub operations with each subprocess being
executed in a special dedicated segment that operates concurrently with all
other segments.
64. Define
parallel processing.
Parallel processing is a term
used to denote a large class of techniques that are used to provide
simultaneous data-processing tasks for the purpose of increasing the
computational speed of a computer system. Instead of processing each
instruction sequentially as in a conventional computer, a parallel processing
system is able to perform concurrent data processing to achieve faster
execution time.
65. What
are the components of memory management unit?
- A
facility for dynamic storage relocation that maps logical memory
references into physical memory addresses.
2 A provision for sharing common
programs stored in memory by different users .
.3. Protection of information
against unauthorized access between users and preventing users from changing
operating system functions.
66. What
is programmed I/O?
Data transfer to and from peripherals
may be handled using this mode. Programmed I/O operations are the result of I/O
instructions written in the computer program.
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